Thin film magnetic memory device for selectively supplying a...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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C365S171000, C365S230030

Reexamination Certificate

active

06925029

ABSTRACT:
Each of N memory blocks of first to Nthstages includes a plurality of first and second driver units. The plurality of first and second driver units are respectively provided corresponding to one end and another end of a plurality of digit lines included in each memory block. Each of the first driver units in memory blocks before a selected memory block connects a corresponding digit line to a first voltage according to a voltage level on a digit line of the same row in a memory block of a previous stage. A second driver unit in the selected memory block connects a corresponding digit line to a second voltage in order to supply a data write current. In other words, digit lines in the memory blocks before the selected memory block are not used as current lines but as signal lines.

REFERENCES:
patent: 6272041 (2001-08-01), Naji
patent: 6618317 (2003-09-01), Tsuji et al.
patent: 6646911 (2003-11-01), Hidaka
patent: 6671213 (2003-12-01), Ohtani
patent: 6714443 (2004-03-01), Ooishi
“A 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in Each Cell”, Scheuerlein et al., ISSCC Digest of Technical Papers, TA7.2, Feb. 2000, pp. 94-95, 128-129, 409-410.
“Nonvolatile RAM based on Magnetic Tunnel Junction Elements”, Durlam et al., ISSCC Digest of Technical Papers, TA 7.3, Feb. 2000, pp. 96-97, 130-131, 410-411.
“A 256kb 3.0V 1T1MTJ Nonvolatile Magnetoresistive RAM”, Naji et al., ISSCC Digest of Technical Papers, TA 7.6, Feb. 2001, pp. 94-95, 122-123, 404-405, 438.

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