Thin film magnetic memory device capable of reducing number...

Details Thin film magnetic memory device capable of reducing number... Thin film magnetic memory device capable of reducing number...

2001-04-16

2003-03-04

Ho, Hoai (Department: 2818)

Static information storage and retrieval

Systems using particular element

Magnetic thin film

C365S173000, C365S148000

Reexamination Certificate

active

06529404

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin film magnetic memory device, and more specifically, it relates to a random access memory comprising a memory cell having a magnetic tunnel junction (MTJ).
2. Description of the Prior Art
An MRAM (magnetic random access memory) device is watched with interest as a memory device capable of storing data in a nonvolatile manner with small power consumption. The MRAM device, storing data in a nonvolatile manner with a plurality of thin film magnetic elements formed in a semiconductor integrated circuit, is capable of making random access to each of the thin film magnetic elements.
In particular, it has recently been reported that the performance of an MRAM device is remarkably progressed by employing thin film magnetic elements utilizing magnetic tunnel junctions (MTJ) as memory cells. An MRAM device comprising memory cells having magnetic tunnel junctions is disclosed in technical literature such as “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC Digest of Technical Papers, TA7.2, Feb. 2000, “Nonvolatile RAM based on Magnetic Tunnel Junction Elements”, ISSCC Digest of Technical Papers, TA7.3, Feb. 2000 or the like.
FIG. 23
is a schematic diagram showing the structure of a memory cell (hereinafter also simply referred to as “MTJ memory cell”) having a magnetic tunnel junction part.
Referring to
FIG. 23
, the MTJ memory cell includes a magnetic tunnel junction part MTJ having a resistance value varying with the level of stored data and an access transistor ATR. The access transistor ATR is formed by a field-effect transistor, and connected between the magnetic tunnel junction part MTJ and a ground voltage Vss.
A write word line WWL for instructing data writing, a read word line RWL for instructing data reading and a bit line BL which is a data line for transmitting an electric signal corresponding to the level of the stored data in data reading and data writing are arranged for the MTJ memory cell.
FIG. 24
is a conceptual diagram illustrating data read operation from the MTJ memory cell.
Referring to
FIG. 24
, the magnetic tunnel junction part MTJ has a magnetic layer (hereinafter also simply referred to as “fixed magnetic layer”) FL having a fixed field of a constant direction and another magnetic layer (hereinafter also simply referred to as “free magnetic layer”) VL having a free field. A tunnel barrier TB formed by an insulator film is arranged between the fixed magnetic layer FL and the free magnetic layer VL. In response to the level of the stored data, either a magnetic field of the same direction as the fixed magnetic layer FL or a magnetic field of a different direction from the fixed magnetic layer FL is written in the free magnetic layer VL in a nonvolatile manner.
In data reading, the access transistor ATR is turned on in response to activation of the read word line RWL. Thus, a sense current Is supplied from a control circuit (not shown) as a constant current flows through a current path along the bit line BL, the magnetic tunnel junction part MTJ, the access transistor ATR and the ground voltage Vss.
The resistance value of the magnetic tunnel junction part MTJ varies with the relation between the field directions of the fixed magnetic layer FL and the free magnetic layer VL. When the field direction of the fixed magnetic layer FL is same to the field direction written in the free magnetic layer VL, the resistance value of the magnetic tunnel junction part MTJ is reduced as compared with the case where the field directions are different from each other.
In data reading, therefore, a voltage drop caused by the sense current Is in the magnetic tunnel junction part MTJ varies with the field direction stored in the free magnetic layer VL. Thus, when starting supplying the sense current Is after temporarily precharging the bit line BL to a high voltage, the level of the data stored in the MTJ memory cell can be read by monitoring change in the voltage level of the bit line BL.
FIG. 25
is a conceptual diagram illustrating data write operation in the MTJ memory cell.
Referring to
FIG. 25
, the read word line RWL is inactivated and the access transistor ATR is turned off in data writing. In this state, data write currents for writing the magnetic field in the free magnetic layer VL are fed to the write word line WWL and the bit line BL respectively. The field direction of the free magnetic layer VL is decided by the combination of the directions of the data write currents flowing through the write word line WWL and the bit line BL respectively.
FIG. 26
is a conceptual diagram showing the relation between the directions of the data write currents and the field directions in data writing.
Referring to
FIG. 26
, symbol Hx on the horizontal axis denotes the direction of a magnetic field H(WWL) formed by the data write current flowing through the write word line WWL. Symbol Hy on the vertical axis denotes the direction of a magnetic field H(BL) formed by the data write current flowing through the bit line BL.
The field direction stored in the free magnetic layer VL is newly written only when the sum of the magnetic fields H(WWL) and H(BL) reaches an area outside asteroid characteristic curves shown in FIG.
26
. In other words, the field direction stored in the free magnetic layer VL is not updated when a magnetic field corresponding to the area inside the asteroid characteristic curves is applied.
In order to update the data stored in the magnetic tunnel junction part MTJ, therefore, currents must be fed to both of the write word line WWL and the bit line BL. The field direction once stored in the magnetic tunnel junction part MTJ, i.e. the stored data, is held in a nonvolatile manner until new data writing is executed.
Also in data read operation, the sense current Is flows through the bit line BL. However, the sense current Is is generally set to be smaller by one or two orders of magnitude than the aforementioned data write currents, and hence there is a small possibility that the data stored in the MTJ memory cell is erroneously rewritten due to influence by the sense current Is in data reading.
The aforementioned technical literature discloses a technique of integrating such MTJ memory cells on a semiconductor substrate and forming an MRAM device, which is a random access memory.
FIG. 27
is a conceptual diagram showing MTJ memory cells integrated/arranged in rows and columns.
Referring to
FIG. 27
, a highly integrated MTJ device can be implemented by arranging the MTJ memory cells in rows and columns on a semiconductor substrate. The MTJ memory cells are arranged in n rows by columns (n and m: natural numbers) in FIG.
27
.
As described above, the bit line BL, the write word line WWL and the read word line RWL must be arranged for each MTJ memory cell. Therefore, n write word lines WWL
1
to WWLn, n read word lines RWL
1
to RWLn and m bit lines BL
1
to BLm must be arranged for the n by m MTJ memory cells. Thus, independent word lines are generally provided for MTJ memory cells in correspondence to read operation and write operation respectively.
FIG. 28
is a structural diagram of an MTJ memory cell arranged on a semiconductor substrate.
Referring to
FIG. 28
, an access transistor ATR is formed on a p-type region PAR of a semiconductor main substrate SUB. The access transistor ATR has source/drain regions
110
and
120
, which are n-type regions, and a gate
130
. The source/drain region
110
is connected with a ground voltage Vss through a metal wire formed on a first metal wiring layer M
1
. A metal wire formed on a second metal wiring layer M
2
is employed for a write word line WWL. A bit line BL is provided on a third metal wiring layer M
3
.
A magnetic tunnel junction part MTJ is arranged between the second metal wiring layer M
2
provided with the write word line WWL and the third metal wiring layer M
3
provided with the bit line BL. The source/drain region
120
of the access transistor AT

Affiliated with

Also associated with

Rating

Thin film magnetic memory device capable of reducing number... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Thin film magnetic memory device capable of reducing number..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thin film magnetic memory device capable of reducing number... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3057650