Thin film chip capacitor for electrical noise reduction in integ

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds

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Details

257784, 257723, 257924, H01L 2312, H01L 2314, H01L 23522

Patent

active

055280838

ABSTRACT:
An integrated circuit chip and flat capacitor assembly are connected with short bonding wires to reduce electrical noise. A flat chip capacitor is coupled to the chip and includes a first electrode, a second electrode and a dielectric layer disposed between the electrodes. The ground and power bonding pads of an integrated circuit chip are coupled to a number of terminals arranged in a row near the outer edge of the capacitor, where each of the terminals is coupled to one of the electrodes. The terminals of the capacitor are connected to a number of package leads of a lead frame or a other integrated circuit package. The invention includes embodiments in which the chip is placed on top of the capacitor, the capacitor is placed on top of the chip, and a flex circuit of a micro ball grid array is placed on a capacitor which is positioned on a chip.

REFERENCES:
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patent: 4994936 (1991-02-01), Hernandez
patent: 5049979 (1991-09-01), Hashemi et al.
patent: 5103283 (1992-04-01), Hite
patent: 5134539 (1992-07-01), Tuckerman et al.
patent: 5274270 (1993-12-01), Tuckerman
patent: 5311057 (1994-05-01), McShane
Hashemi et al., "The Close Attached Capacitor: A Solution to Switching Noise Problems," IEEE, May 1992.
Loo et al., "Area Array Chip Carrier: SMT Package for Known Good Die," ISHM 1993 Proceedings.
Matthew et al., "Future Directions in TAB: The TCC/MCM Interconnect," Tessera, Inc.
"Tessera Compliant Chip Technology Overview," Tessera, Inc.

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