Thin ball grid array package

Details Thin ball grid array package Thin ball grid array package

2003-10-03

2008-10-21

Trinh, Michael (Department: 2822)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C438S124000, C438S126000

Reexamination Certificate

active

07439099

ABSTRACT:
An integrated circuit package is provided. The package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween. The substrate further has a cavity therein and a heat slug is fixed to the substrate and spans the cavity. A semiconductor die is mounted to the heat slug such that at least a portion of the semiconductor die is disposed in the cavity. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate and an encapsulating material encapsulates the wire bonds and the semiconductor die. A ball grid array is disposed on the first surface of the substrate. Bumps of the ball grid array are in electrical connection with ones of the conductive traces.

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U.S. Appl. No. 10/307,279, Chun Ho Fan et al., “Thin Ball Grid Array Package”, filed Dec. 2, 2002.

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