Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2009-09-24
2011-11-08
Sefer, A. (Department: 2893)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S617000, C257SE23031, C257SE51020
Reexamination Certificate
active
08053285
ABSTRACT:
In a method and system for fabricating a thermally enhanced semiconductor device (200, 300) is packaged as a through hole single inline package (SIP). A leadframe (210, 310, 410) having a die pad (220, 320, 420) to attach an IC die (230, 330), a first plurality of conductive leads (240, 340, 430) formed from a first portion of metal sheet (432), and a second portion of metal sheet (440) disposed on an opposite side of the IC die (230, 330) as the first plurality of conductive leads is stamped from a metal sheet. The first plurality of conductive leads (240, 340, 430) are arranged in a single line and are capable of being through hole mounted in accordance with the SIP. The second portion of metal sheet (440) includes the die pad (420) to form a heat spreader (260, 360) in the form of the metal sheet. The heat spreader (260, 360) provides heat dissipating for the heat generated by the IC die (230, 330).
REFERENCES:
patent: 6608369 (2003-08-01), Sone
patent: 2007/0194453 (2007-08-01), Chakraborty et al.
Boyd William D
Coyle Anthony L
Haga Chris E
Brady III Wade J.
Nguyen Dilinh
Sefer A.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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