Thermally enhanced BGA package

Details Thermally enhanced BGA package Thermally enhanced BGA package

1999-04-26

2001-02-20

Cuchlinski, Jr., William A. (Department: 3661)

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

C174S034000, C361S707000, C361S800000, C257S659000, C257S778000

Reexamination Certificate

active

06191360

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to an encapsulated BGA and more particularly to a flip chip package having a thermally conductive member encapsulated with the chip.
2. Description of the Related Art
Flip chip packages require a cover of some type over the silicone chip to protect it and to provide a larger flat surface for pick-and-place operations. However, any cover or encapsulant above the chip increases the thermal resistance path to an ambient environment and, hence, the operational temperature of the chip is increased.
U.S. Pat. No. 5,811,317, issued on Sep. 22, 1998 to Maheshwari et al., discloses a method for assembly of bare silicon die onto flexible or thin laminate substrates that minimizes substrate and die warpage induced after underfilled cure operations and at the same time reduces the cycle time for the assembly process. More specifically, an opposing layer of thermoset component is adhered to a balance plate (metal) or other material with an applicable coefficient of thermal expansion and modulus of elasticity on the top of the die. The offsetting layer of material causes the die to warp to the other side and as a result the two self opposing warpage effects neutralize themselves. Referring to
FIG. 1
, the flip chip package comprises a substrate
10
, a chip
11
, and a balance plate
12
. The chip
11
is sandwiched between the substrate
10
and the balance plate
12
. An underfill material
13
mounts the chip
11
to the substrate
10
, and an overfill material
14
mounts the balance plate
12
to the chip
11
. The drawback of the underfill material
13
is that after curing it is extremely rigid. Therefore, the balance plate
12
causes the chip
11
to warp to the other side and as a result the two self opposing warpage effects naturalize themselves. However, the balance plate
12
does not have the capability of heat conduction from the balance plate
12
to the substrate
10
.
U.S. Pat. No. 5,726,079, issued on Mar. 10, 1998 to Johnson, discloses a thermally conductive planar member in thermally conductive communication with a flip chip encapsulated within a dielectric material that surrounds portions of the thermally conductive planar member, the flip-chip, and a predefined portion of a substrate member. The flip chip package has pick-and-place capability without the thermal resistance disadvantage of capped chip packages. Referring to
FIG. 2
, the flip chip package comprises a substrate
20
, a chip
21
and a thermally conductive planar member
22
. The chip
21
, mounted on the substrate
20
, is connected to the planar member
22
by an adhesive
23
therebetween. An encapsulant
24
surrounds an ambient environment of the chip
21
and the planar member
22
. However, the planar member
22
, for heat dissipation, conducts little heat from the planar member
22
, and from the chip
21
, to solder bumps of the substrate
20
.
The present invention intends to provide a thermally enhanced BGA package which mitigates and overcomes the above problem.
SUMMARY OF THE INVENTION
The primary object of this invention is to provide a thermally enhanced BGA package, which comprises a heat spreader conducting heat from a top surface of a chip to the air as well as conducting heat from a bottom surface of the chip to the substrate.
The secondary object of this invention is to provide a thermally enhanced BGA package, which comprises a heat spreader shielding Electro Magnetic Interference (EMI) to a chip.
The other object of this invention is to provide a thermally enhanced BGA package, which comprises a heat spreader providing grounding effect on the substrate so as to reduce cross talk and characteristic impedance effects.
The other object of this invention is to provide a thermally enhanced BGA package, which comprises a heat spreader mitigating warpage effect.
In accordance with the present invention, a BGA package comprises a substrate, a chip, a pad and a heat spreader. The chip mounted on the substrate, which including the pad, is disposed in thermally conductive communication with the heat spreader that extends around the periphery of the pad. The heat spreader for heat dissipation conducts heat from the top surface of the chip to a heat dissipation member on the substrate, and to a pad. An encapsulant is exposed on the top of the spreader for heat convection. Therefore, heat on the top of the chip dissipates through conduction and convection at the same time.
Other objectives, advantages and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 5371404 (1994-12-01), Juskey et al.
patent: 5442521 (1995-08-01), Hirvonen et al.
patent: 5583377 (1996-12-01), Higgins, III
patent: 5726079 (1998-03-01), Johnson
patent: 5811317 (1998-09-01), Maheshwari et al.
patent: 5898571 (1999-04-01), Mertol

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