Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2008-03-31
2009-12-08
Mandala, Victor A (Department: 2826)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S238000, C438S614000, C257S071000, C257SE21077, C257SE21083, C257S707000, C361S704000, C361S719000, C029S840000
Reexamination Certificate
active
07629203
ABSTRACT:
A combined thermal interface material and second layer interconnect reflow material and method are disclosed.
REFERENCES:
patent: 7164585 (2007-01-01), Jadhav et al.
patent: 2005/0145846 (2005-07-01), Brandenburger
patent: 2006/0227510 (2006-10-01), Fitzgerald et al.
patent: 2006/0275952 (2006-12-01), Gowda et al.
patent: 2006/0293172 (2006-12-01), Rubinsztajn et al.
Houle Sabina
Suh Daewoong
Zarbock Edward A
Cool Patent P.C.
Curtin Joseph P.
Intel Corporation
Mandala Victor A
Moore Whitney
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