Thermal capacity for electronic component operating in long...

Details Thermal capacity for electronic component operating in long... Thermal capacity for electronic component operating in long...

2001-01-12

2003-05-06

Clark, Sheila V. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

C257S707000

Reexamination Certificate

active

06559534

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a thermal capacitor device for electronic components operating in long pulses. It is more particularly applicable to heterojunction bipolar transistors and especially to such transistors operating at microwave frequencies.
2. Discussion of the Background
Microwave components operating in pulses from several tens to several hundreds of microseconds, or even above a millisecond, in duration are used to produce equipment of the air-traffic-control radar type.
In such components, the temperature of the junction varies during the pulse; it firstly rises proportionally to the square root of the time before reaching a high level if the duration is long enough and then comes backs down at the end of the pulse at the same rate before reaching a low level if the duty cycle is substantially smaller than unity.
The maximum temperature rise &Dgr;T
max
of the active part of the component, which may be called the junction, during a pulse of length &tgr; is of the form
&Dgr;T
max
=(1
−D
)×&Dgr;
T
pulse
+D&Dgr;T
CW
,
where:
D is the duty cycle;
&Dgr;T
pulse
is the temperature rise in the pulse; and
&Dgr;T
CW
is the temperature rise which would correspond to a continuous operation of the component with the same power level.
The temperature rise of the junction during an operating pulse of duration &tgr; generating a thermal power P
th
over an area S is:
&Dgr;T
pulse
=(
P
th
/S
).(&tgr;/&lgr;.&rgr;.c
p
)
½
where
&lgr; represents the thermal conductivity of the material in question;
&rgr; represents its density and
c
p
represents its specific heat capacity.
The depth of penetration of the heat into the semiconductor material during the period of a pulse, called the thermal diffusion length, is:
L=
(&tgr;.&lgr;/&rgr;.c
p
)
½
The thermal energy generated during the pulse is:
E
th
=0.5.
S.
(&lgr;.&rgr;.c
p
)
½
.&Dgr;T
pulse
,
where (&lgr;.&rgr;.c
p
)
½
represents the thermal effusivity of the material in question, i.e. its ability to rapidly discharge heat from the point where it is generated.
An elementary heterojunction bipolar transistor (HBT) is composed of an emitter, a base and a collector.
This type of transistor comprises (see FIG.
1
):
a semiinsulating substrate S made of GaAs;
a subcollector layer SC made of n
+
-doped GaAs (dopant concentration typically about 4.10
18
cm
−3
;
a collector layer C made of n-doped GaAs (dopant concentration typically about 2.10
16
cm
−3
), GaInP or another semiconductor;
a base layer B made of p-doped GaAs (dopant concentration typically about 7.10
19
cm
−3
);
an emitter layer E made of n-doped GaInP (dopant concentration typically 3.10
17
cm
−3
).
Collector contacts CC
1
and CC
2
are produced on the subcollector layer SC, base contacts CB1 and CB2 are produced on the base layer B and an emitter contact CE is produced on the emitter layer E.
A microwave-power HBT transistor consists of a larger number of parallel-mounted elementary modules. In order to make the flow of heat through the substrate uniform, the emitters, having a width of a few microns, typically two microns, are separated by a few tens of microns, typically about thirty microns. It is known on such a structure to superpose a thermal shunt as described in French Patent Application No. 97/06682. This thermal shunt extracts some of the heat generated via the top of the emitter in order thereafter to dissipate it through the free space between two elementary transistors separated typically by about ten microns. Thus, we can assume that the area to be taken into account for dissipating the heat is much greater than the total area of the emitter fingers—it approaches the area which surrounds the entire region covered by the transistors.
When a heterojunction transistor operates in long pulses (typically longer than 100 microseconds), the rise in its temperature during a pulse may be close to or greater than 100° C.—this results in a number of drawbacks:
1) the maximum power allowed is often limited by the temperature reached during a pulse rather than by the average power to be dissipated;
2) the power decreases when the temperature rises;
3) the phase varies when the temperature rises.
SUMMARY OF THE INVENTION
The subject of the invention is a solution making it possible to limit the magnitude of the temperature increase and to reach a steady state very rapidly.
The invention therefore relates to an electronic component comprising, on a substrate, a first stack of different layers defined in the form of a mesa terminated at its upper part in an electrical contact layer, which layer is coated with an electrically and thermally conducting layer surmounted by a heat sink element in contact with said conducting layer, characterized in that the heat sink element has a plane shape and in that the component includes at least one pad which consists of a second stack of layers, these being similar to said defined layers, and is also coated with said electrically and thermally conducting layer, said sink element also being in contact with the electrically and thermally conducting layer so as to conduct the heat from the sink element into the substrate.
The invention also relates to a process for producing a heterojunction bipolar transistor, comprising the following steps:
production on a substrate of an alternation of the following layers, with the materials indicated by way of example in parenthesis:
subcollector layer (n
+
:GaAs)
collector layer (&mgr;:GaAs)
emitter layer (n:GaInP);
etching of the various layers above so as to produce the elementary transistors and to produce pads;
production of the base contacts and collector contacts;
filling of the free spaces between the transistors and the pads with an insulating material and planarization so as to obtain a surface flush with the upper faces of the transistors and of the pads;
deposition of a layer which constitutes a heat sink layer making contact with the upper faces of the transistors and of the pads;
fastening of a heat sink plate in contact with the heat sink layer.


REFERENCES:
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patent: 28 39 043 (1979-03-01), None
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patent: 2 328 286 (1977-05-01), None
patent: WO 95/31006 (1995-11-01), None

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