Thermal annealing method for preventing defects in doped...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S717000, C438S722000, C438S743000

Reexamination Certificate

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07977246

ABSTRACT:
A thermal anneal process for preventing formation of certain BPSG surface defects following an etch or silicon clean step using a fluorine and hydrogen chemistry. The thermal anneal process is carried out while protecting the wafer from moisture, by heating the wafer to a sufficiently high temperature for a sufficient duration of time to thermally diffuse boron and/or phosphorus materials separated from silicon near the surface of the doped glass layer into the bulk of the layer. The thermal anneal process is completed by cooling the wafer to a sufficiently low temperature to fix the distribution of the boron and/or phosphorus materials in bulk of the doped glass layer.

REFERENCES:
patent: 6268298 (2001-07-01), Komura et al.
patent: 6734108 (2004-05-01), Jin et al.
patent: 2002/0081852 (2002-06-01), Sandhu
patent: 2003/0003756 (2003-01-01), Yu
patent: 2008/0242048 (2008-10-01), Nakai et al.
U.S. Appl. No. 12/173,331, filed Jul. 15, 2008, Kao et al.

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