Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
Reexamination Certificate
1999-07-10
2001-04-10
Heckler, Thomas M. (Department: 2182)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Multiple or variable intervals or frequencies
C713S323000
Reexamination Certificate
active
06216235
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a computing device and, more particularly, to a method and apparatus for controlling a processor's clock frequency.
2. Description of the Related Art
It is known that if no user activity has occurred for a period of time that a portable computer can be placed in a suspend or sleep mode. It is also known to suspend or slow a computer's processor (e.g., microprocessor, CPU) when the processor is not actively processing. The following patents and patent publications are representative of the current state of the art:
(a) U.S. Pat. No. 5,201,059 discloses a sleep mode which is activated when control given to BIOS or alternatively by incorporating some statistical analysis of the frequency of BIOS calls. In this patent, the sleep mode either stops the clock or slows it to 4 MHz.
(b) U.S. Pat. No. 5,167,024 discloses a power management system for a laptop computer. The power management system operates to disconnect power sources and/or clock signals to various peripheral devices to conserve battery power. The slow mode is entered into when no activity has been detected for a predetermined period of time.
(c) U.S. Pat. No. 5,218,704 discloses a technique for power conservation based on real-time sampling of CPU activity. The activity is sampled during interrupts and when it determines that the CPU may rest, a sleep clock is supplied to the CPU. The detection of an interrupt restores the clock to the fast rate prior to processing the interrupt.
(d) U.S. Pat. No. 5,239,652 discloses a technique for power consumption which disconnects the CPU from the power supply when control logic determines the CPU is not actively processing. Thereafter, the CPU is periodically powered-up to perform housekeeping chores as well as to determine it normal processing should be resumed.
(e) European patent publication EP-0474963 discloses a sleep mode controller which lowers the CPU clock speed when no input/output operation (when keyboard control routine of BIOS executed no input key data in key buffer, or when CPU is idle and no input key data in the key buffer) is performed. The system uses a clock generator circuit which produces the low clock (4 MHz), the high clock (32 MHz) and a slightly slower high clock (16 MHz). A keyboard controller is used to determine which of the high clocks is used, with selection being made by the computer user. The sleep mode controller is disabled if the AC adapter is connected.
(f) U.S. Pat. No. 5,230,055 discloses a portable computer wherein the computer is make inoperable when ambient temperature or humidity become too high. Here, ambient temperature and humidity are periodically monitored.
(g) European patent publication EP-0381021 discloses a power saving system for a personal computer. The system operates to allow or stop power to be supplied to an oscillator based on control data set to a control register via keyboard or software.
(h) U.S. Pat. No. 5,021,679 discloses a power system for a portable computer wherein the supply voltage is varied depending on the current being supplied to the computer by the power system. Further, a variable-frequency clock is provided which varies its frequency based on the supply voltage being produced.
External clocks have been used to provide a computer system with faster clocks. Here, the faster external clock is substituted for the internal clock of the computer system. U.S. Pat. No. 5,134,703 is illustrative of an external clock unit which supplies a faster clock to a computer without requiring any hardware changes within the computer.
The problem with all the prior solutions to energy conservation is that the processors can still overheat. In particular, during prolonged processing or activity by a computer's processor, the processor will not enter its sleep mode (if any) and as a result the processor will become hot and require extensive means to cool the processor to prevent overheating and eventual failure of the processor. Overheating and failure of the processor can also occur when the computer is used in particularly hot environmental temperatures, the computer's cooling fan fails, or when cooling of the processor is otherwise inadequate.
Another problem is that with portable computers, manufacturers have to either use a lower clock frequency (lower than would be used in a comparable desk top computer) for processing or provide a fan for cooling. A lower clock frequency is not satisfactory as users want maximum processing power just as they get with a desk top computer. Requiring a portable computer to use a fan for cooling is also unsatisfactory because it consumes battery energy.
Thus, there is a need for a solution to the above problems which enables a computing device to maximize its processing speed while, at the same time, preventing overheating.
SUMMARY OF THE INVENTION
Broadly speaking, the invention relates to novel techniques for controlling a processor's clock frequency or fan speed so as to prevent overheating. While preventing overheating, the invention attempts to maximizes the processing speed of the processor or to conserve power.
Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principals of the invention.
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Thomas Alan E.
Thomas C. Douglass
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