Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – With textured surface
Patent
1992-01-14
1995-12-12
Hille, Rolf
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
With textured surface
257785, 361760, 361767, H01L 2348, H01L 2302, H01L 2316, H01L 2342
Patent
active
RE0351199
ABSTRACT:
Integrated circuit chip-to-chip interconnections are made via gold pads on each chip that are bonded to corresponding gold pads on a silicon wafer chip carrier. The pads on the chips and/or the pads on the carrier are characterized by texturing (roughening) with a feature size of the order of a micrometer or less, so that each of the pads on the chip can be attached to each of the pads on the carrier by compression bonding at room temperature--i.e., cold-well bonding. In particular, the texturing of the gold pads on the silicon carrier is obtained by etching V-grooves locally on the surface of the underlying silicon carrier in the regions of the pads, thermally growing a silicon dioxide layer on the silicon career, and depositing the gold on the silicon dioxide layer.
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Blonder Greg E.
Fulton Theodore A.
AT&T Corp.
Caplan David I.
Hille Rolf
Ostrowski David
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