Texture engine memory access synchronizer

Details Texture engine memory access synchronizer Texture engine memory access synchronizer

2007-04-10

2007-04-10

Tung, Kee M. (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Graphic display memory controller

C345S505000, C345S506000, C345S552000

Reexamination Certificate

active

10843442

ABSTRACT:
An arbitration mechanism for balancing memory requests issued by parallel texture pipelines in a multiple pipeline texture engine. The mechanism ensures that, as polygon textures are processed by a texture engine, all of the memory requests associated with a portion of a given graphics texture are issued by all texture pipelines before any texture pipeline may issue a memory request for another portion of a graphics texture. Thus, the invention balances graphics texture processing between parallel texture pipelines operating together, thereby improving processing efficiency and preventing deadlock conditions.

REFERENCES:
patent: 6333744 (2001-12-01), Kirk et al.
patent: 6389504 (2002-05-01), Tucker et al.
patent: 6426753 (2002-07-01), Migdal
patent: 6591347 (2003-07-01), Tischler et al.
patent: 6618053 (2003-09-01), Tanner
patent: 6781588 (2004-08-01), Margittai et al.

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