Testing of embedded memory by coupling the memory to input/outpu

Details Testing of embedded memory by coupling the memory to input/outpu Testing of embedded memory by coupling the memory to input/outpu

1997-07-10

1999-03-30

Nelms, David

Static information storage and retrieval

Read/write circuit

Testing

365 63, G11C 700

Patent

active

058897135

ABSTRACT:
A method and circuits for coupling a memory embedded in an integrated circuit to interconnect pads during a memory test mode is disclosed. The integrated circuit contains a processor, an embedded memory and a switching circuit for: (1) temporary coupling the interconnect pads of the integrated circuit, coupled to the processor during normal operation mode of the circuit, to the memory during a memory test mode; (2) and decoupling the external interconnect pads from the memory, after the memory is tested, and coupling them to the processor.

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