Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-09-17
2010-06-15
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C700S110000, C702S059000, C702S084000, C702S181000, C714S025000, C714S037000, C714S726000, C324S537000
Reexamination Certificate
active
07739631
ABSTRACT:
A testing method includes: storing QC data for each of electronic device manufacturing processes in a storage unit; changing the QC data for each of the processes to a common fixed form of data; providing a contour for the QC data for each of the processes using the common fixed form of data; comparing a singularity map to a failure generation map for a completed device; and finding a causal process for a failure and a defect through the comparison.
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Onoue Seiji
Teramoto Ryuuichi
Kabushiki Kaisha Toshiba
Kik Phallaka
Pearne & Gordon LLP
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