Testing design for flip chip connection process

Details Testing design for flip chip connection process Testing design for flip chip connection process

2005-06-28

2005-06-28

Do, Thuand (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06912699

ABSTRACT:
A testing design for flip chip connection process. In one embodiment the testing design has a substrate, a plurality of connections formed on said substrate, at least one integrated device and a plurality of bumps formed on said integrated device, wherein at least one of said bumps is electrically connected to said plurality of connectors to form an electrical channel.

REFERENCES:
patent: 6492692 (2002-12-01), Ishii et al.
patent: 6801071 (2004-10-01), Shizuki

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