Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
Reexamination Certificate
1998-10-27
2001-05-08
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Transmission facility testing
C714S735000
Reexamination Certificate
active
06230289
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the analysis and testing of data streams, primarily although not exclusively data contained in data packets in a communication network, whereby to develop mainly statistical or control information for use in the management of the network.
A primary usage of the invention would be in a processor which is adapted to receive information from a variety of sources, such as audio sources, telephone, television, local area networks and others, providing streams of information, normally in data packets which may assume a variety of forms, and prepares those packets, by modification of the packets, particularly in relation to header information, for transmission over a common medium, such as a synchronous transfer mode link whereby the data packets are transmitted over a plurality of virtual circuits (defined by the segmenting and switching operation of an asynchronous transfer mode switch) to a variety of receivers wherein the packets are distributed to their ultimate destinations. The processor could but need not be one that performs a bidirectional function acting both as a receiver and ATM transmitter as well as an ATM receiver and distributor of the packets.
BACKGROUND TO THE INVENTION
It is a practical necessity in communication systems generally, and certainly of the type just mentioned, to provide temporary storage of data packets in a fairly high volume random access memory, normally a dynamic random access memory in order to provide rapid reading and retrieval operations. It is known quite widely to organise such a memory into a multiplicity of buffers each capable of containing data corresponding to a substantial number of data packets and to control the reading and writing of data to and from the buffers by means of software conveniently termed pointer tables which indicate the order in which buffers will be read and also indicate which buffers are available.
Organisation of the storage of data in this manner is a practical necessity owing to the large variety of possible sources and rates of communication of data which those sources may provide, the different priorities of data or data channels and so on.
Commonly, for example, data packets received at a processor of this kind needs data processing for each packet, for example the examination of the address data (such as MAC address) so that it may be allotted to appropriate communication channels according to whether it is a uni-cast message (intended for a specific destination), a multi-cast message (intended for a specified plurality of destinations) or a broadcast message, and so on.
It is desirable to analyse the control data or destination data in the data packets in order to obtain statistical information which will assist the management of data flow in the network to determine, for example, whether there is an undue proportion of defective data packets. It is also desirable to be able to add offsets to data values to assist in examining different pointers of a data packet for statistical collection purposes. These and other operations may be performed by a data processor but the large volume of data normally handled by a system of this nature makes the consumption of ordinary data processing time undesirable owing partly to the difficulty of providing sufficient processing power and partly to the increased latency that would be produced.
The present invention is one aspect of an improved technique by means of which buffer data can be analysed more efficiently.
SUMMARY OF THE INVENTION
The invention particularly concerns the comparison of data patterns with test patterns. It Is customary to store both data patterns and test patterns in temporary storage before a comparison cycle. This is necessary because comparison will normally be preceded by masking to ensure that the appropriate bits are compared against the test pattern. However, it is now proposed that test patterns be burst read and stored in temporary locations and that data patterns be simultaneously compared with test patterns and stored consecutively in temporary storage locations. A converse process may be used for the comparison of further test patterns with the data patterns: the subsequent test patterns may be burst read and simultaneously compared previously with stored data patterns and themselves stored in temporary locations. Such a process is particularly efficient when used in conjunction with dynamic random access memory if the burst reading cycles are normally all of the same length.
REFERENCES:
patent: 4748438 (1988-05-01), Mickeal
patent: 5351243 (1994-09-01), Kalkunte et al.
patent: 5394394 (1995-02-01), Crowther et al.
patent: 5509006 (1996-04-01), Wilford et al.
patent: 5648965 (1997-07-01), Thadani et al.
patent: 5724558 (1998-03-01), Svancarek et al.
patent: 5841771 (1998-11-01), Irwin et al.
patent: 5916305 (1999-06-01), Sikdar et al.
patent: 5991279 (1999-11-01), Haugli et al.
patent: 6021515 (2000-02-01), Shimura
patent: 0142129 A2 (1987-10-01), None
patent: 0647082 A2 (1995-04-01), None
Hughes Mark A.
O'Connell Anne G.
3Com Technologies
Chase Shelly A
De'cady Albert
Nixon & Vanderhye P.C.
LandOfFree
Testing data packets does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Testing data packets, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Testing data packets will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2474965