Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1999-05-10
2001-03-20
Metjahic, Safet (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S754090, C324S758010
Reexamination Certificate
active
06204676
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to for a ball grid array (BGA) device, more particularly to a testing apparatus adapted for use in testing BGA devices.
2. Description of the Related Art
Ball grid array (BGA) packages are high pin count integrated circuit packages that are widely used in surface mounting applications. Referring to
FIG. 1
, a known BGA device
1
includes a semiconductor device
12
disposed on a dielectric insulating substrate
11
that is formed with circuit traces (not shown) for electrical connection with the semiconductor device
12
. A plurality of signal, ground and voltage source solder balls
13
,
14
and
15
, that are formed from tin, are provided on a bottom face of the insulating substrate
11
and are connected electrically to the circuit traces to serve as electrical contacts for the BGA device
1
. The signal solder balls
13
are arranged in an array at a periphery of the bottom face. The voltage source solder balls
15
are arranged in a squarely looped array at a central portion of the bottom face. The ground solder balls
14
are arranged in rows within the squarely looped array, and are spaced apart from the voltage source solder balls
15
. In the mass production of BGA devices
1
, a number of insulating substrates
11
are initially interconnected as a large insulating plate. After the circuit traces are formed, the large insulating plate is subsequently cut to form the individual insulating substrates
11
, thereby resulting in exposed conductive contacts (not shown) on the margins
16
of each insulating substrate
11
.
Referring to
FIGS. 2 and 3
, a conventional testing apparatus for testing BGA devices includes a movable carrier
3
for receiving a BGA device
1
, a tester
2
, and a moving device (not shown) for moving the BGA device
1
from the carrier
3
to the tester
2
. The carrier
3
has a squarely looped flange
31
formed on a bottom side of an inner surface of the carrier
3
for isolating the BGA device
1
from the bottom side. The squarely looped flange
31
has a cross-section larger than that of the squarely looped array of the voltage source solder balls
15
. The tester
2
includes a testing circuit unit
21
provided with a testing circuit layout, and a socket
23
formed from an insulator material and retained on the testing circuit unit
21
via a mounting seat
22
that is fixed on the testing circuit unit
21
. The socket
23
is formed with a receiving space
25
that opens upwardly. Guide members
26
project inwardly from the socket
23
into the receiving space
25
. The socket
23
has a contactor plate
27
disposed at a bottom end of the receiving space
25
and formed with a plurality of spring probes or pogo pins
29
that are registered with the solder balls
13
,
14
and
15
of the BGA device
1
that is to be tested. A surface mount matrix
24
interconnects the pogo pins
29
and the testing circuit layout on the testing circuit unit
21
. The pogo pins
29
, in turn, interconnect the BGA device
1
and the surface mount matrix
24
.
When testing the BGA device
1
for defects, the BGA device
1
is loaded into the receiving space
25
of the socket
23
to enable the solder balls
13
,
14
and
15
to contact the pogo pins
29
. The guide members
26
function to align the BGA device
1
in relation to the pogo pins
29
in the receiving space
25
by contacting the margins
16
of the insulating substrate
11
so as to guide the insulating substrate
11
into the receiving space
25
in a proper position. The BGA device
1
is then pressed toward the pogo pins
29
to ensure electrical connection between the BGA device
1
and the testing circuit layout
28
on the testing circuit unit
21
via the pogo pins
29
and the surface mount matrix
5
.
Some of the drawbacks of the conventional testing apparatus described beforehand are as follows:
1. As the distances of the margins
16
of the insulating substrate
11
from the solder balls
13
,
14
and
15
can vary due to errors that may occur during the cutting of the insulating substrate
11
, there are chances that the solder balls
13
,
14
and
15
will not be placed properly on the pogo pins
29
when aligning the BGA device
1
in relation to the pogo pins
29
by referring to the margins
16
of the insulating substrate
11
. When the BGA device
1
is pressed toward the pogo pins
29
, scratching of the surface of the solder balls
13
,
14
and
15
by the pogo pins
29
is likely occur. The solder material removed from one of the solder balls
13
,
14
and
15
can get trapped between an adjacent pair of the solder balls
13
,
14
and
15
and can result in short-circuiting. Moreover, the solder balls, once scratched, will decrease of the yield of non-defective products during the surface mounting of the BGA device
1
.
2. As mentioned beforehand, exposed conductive contacts are present on the margins
16
of the insulating substrate
11
of the BGA device
1
. After the BGA device
1
has been tested for defects and is removed from the socket
23
, static electricity is usually observed between the guide members
26
in the receiving space
25
and exposed conductive contacts at the margins
16
of the BGA device
1
. The static electricity is discharged via the BGA device
1
since the socket
23
is made entirely from an insulator material, and can result in damage to the BGA device
1
.
3. Due to the lengths of the pogo pins
29
, the BGA device
1
experiences loss during high frequency testing.
SUMMARY OF THE INVENTION
Therefore, the main object of the present invention is to provide a testing apparatus for a BGA device that can avoid scratching of the solder balls, that can reduce the amount of static electricity discharge during testing the BGA device for defects, and that can minimize losses during high frequency testing.
According to this invention, a testing apparatus is adapted for testing a ball grid array (BGA) device having a bottom face formed with a plurality of signal solder balls, a plurality of ground solder balls, and a plurality of voltage source solder balls. The voltage source solder balls are arranged in a squarely looped array at a central portion of the bottom face of the BGA device. The ground solder balls are arranged in rows within the squarely looped array and are spaced apart from the voltage source solder balls.
The testing apparatus includes a movable carrier, a tester and a moving device. The carrier has a top face recessed to form a cavity of square shape which is adapted to receive the BGA device and which has a cavity bottom face, and a centering member disposed at a center part of the cavity bottom face and adapted to center the squarely looped array of the voltage source solder balls relative to the center part of the cavity bottom face. The centering member includes ridge means projecting upward from the cavity bottom face and adapted to engage and prevent positional deviation of the squarely looped array of the source solder balls when the BGA device is seated on the cavity bottom face. The tester includes a testing circuit unit provided with a testing circuit layout, a surface mount matrix disposed on top of the testing circuit unit, and a hollow frame member mounted on top of the surface mount matrix. The frame member has an inner wall face confining a square central opening to expose the surface mount matrix so as to permit the surface mount matrix to make a direct electrical contact with the BGA device when the BGA device is placed in the central opening. The inner wall face is free of means for aligning and guiding margins of the BGA device relative to the surface mount matrix. The moving device is movable from the carrier to the frame member and is adapted to remove the BGA device from the carrier and to locate the BGA device in the central opening of the frame member.
REFERENCES:
patent: 5982186 (1999-11-01), Buschbom
patent: 6018249 (2000-01-01), Akram et al.
patent: 6046597 (2000-04-01), Barabi
patent: 6069481 (2000-05-01), Matsum
Hsieh Lai-Fue
Hsieh Yi-Chang
Liao Mu-Sheng
Ladas & Parry
Metjahic Safet
Silicon Integrated Systems Corp.
Sundaram T. R.
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