Testing apparatus for non-packaged semiconductor chip

Details Testing apparatus for non-packaged semiconductor chip Testing apparatus for non-packaged semiconductor chip

1997-05-09

1999-11-23

Regan, Maura

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324765, 439266, G01R 3102

Patent

active

059906928

ABSTRACT:
A non-packaged semiconductor chip testing apparatus includes a lead frame having chips with a plurality of leads which are electrically isolated from the other leads, and are supported by adhesive tape and bonded to the chip via wires. The lead frame is placed on a holding plate having windows, so that the leads of the lead frame are exposed through the windows and contact test probes located under the plate. The test probes, such as pogo pins or bending leads, extend upwardly from a substrate. A base receives the substrate, with cables extending from a lower surface of the substrate passing through openings in the base, where they then connect a test board. After being pressed down by a pressing cover, the lead frame on the holding plate moves down so that the leads may contact the test probes. The pressing cover is movable up and down. Guide pins on the base are simultaneously inserted into through holes of the holding plate and lead frame, and extend into recesses in the pressing cover to ensure alignment.

REFERENCES:
patent: 5006792 (1991-04-01), Malhi et al.
patent: 5479105 (1995-12-01), Kim et al.
patent: 5548884 (1996-08-01), Kim
patent: 5559444 (1996-09-01), Farnworth
patent: 5572140 (1996-11-01), Lim
patent: 5633122 (1997-05-01), Tuttle
patent: 5705933 (1998-01-01), Lim
patent: 5721496 (1998-02-01), Farnworth
patent: 5825195 (1998-10-01), Hembree
patent: 5844418 (1998-12-01), Wood
patent: 5847572 (1998-12-01), Iwasaki

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