Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1982-04-20
1986-02-25
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
365201, G11C 800, G11C 1140
Patent
active
045731462
ABSTRACT:
A method and apparatus is described for initiating a selected functional mode for a semiconductor memory circuit to determine the implementation of redundant elements in a semiconductor memory. The method for initiating the selected functional mode comprises applying an active state of at least a first of the operational signals to the memory circuit followed by applying an active state of a second of the operational signals to the memory circuit. The timing of the second operational signal relative to the first operational signal is not within the defined specification limits of the first and the second operational signals for conventional data transfer to and from the memory. An example of the selected functional mode is the activation of circuitry (62) which serves to apply a predetermined data state to a redundant column (63) which can be substituted to replace a defective primary column within a memory array. After the memory array has previously received a first data state and the circuit (62) is activated to apply a second data state to the redundant column (63) the memory array is read and each column which produces a second data state is determined to be a redundant column. With knowledge of the column substitution algorithm, it can then be determined which of the redundant columns have been programmed to replace specific original columns. This method can therefore determine the physical configuration of the memory circuit despite the incorporation of redundant elements into the primary memory array.
REFERENCES:
patent: 4051354 (1977-09-01), Choate
patent: 4346459 (1982-08-01), Sud et al.
patent: 4399372 (1983-08-01), Tanimoto et al.
Graham Andrew C.
Proebsting Robert J.
Segers Dennis L.
Mostek Corporation
Popek Joseph A.
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