Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2008-09-23
2008-09-23
Baderman, Scott T (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S718000, C714S738000
Reexamination Certificate
active
10478403
ABSTRACT:
Disclosed is a test method for testing a data store having an integrated test data compression circuit where the data store has a memory cell array with a multiplicity of addressable memory cells, read/write amplifiers for reading and writing data to the memory cell via an internal data bus in the data store and a test data compression circuit which compresses test data sequences, which are each read serially from the memory cell array, with stored reference test data sequences in order to produce a respective indicator data item which indicates whether at least one data error has occurred in the test data sequence which has been read.
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Benedix Alexander
Düregger Reinhard
Hermann Robert
Ruf Wolfgang
Baderman Scott T
Eschweiler & Associates LLC
Infineon - Technologies AG
Schell Joseph
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