Test vector manager, method of managing test vectors and a...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Reexamination Certificate

active

07457987

ABSTRACT:
The present invention provides a test vector manager for use with a unit under test (UUT). In one embodiment, the test vector manager includes a gateway device, coupled to the UUT, configured to provide a testing pathway for the UUT to coordinate test requests and responses for a backplane multi-drop test bus. The test vector manager also includes a test memory, coupled to the gateway device, configured to retrieve version-specific test vectors, which are resident on the UUT and correspond to the test requests. The test vector manager further includes a chain configuration logic unit, coupled to the test memory, configured to return the version-specific test vectors to the backplane multi-drop test bus employing the testing pathway. Alternatively, the test vector manager is further configured to connect the backplane multi-drop test bus to local UUT test bus and scan chain interfaces for tests using the version-specific test vectors.

REFERENCES:
patent: 5423050 (1995-06-01), Taylor et al.
patent: 5841788 (1998-11-01), Ke
patent: 7149943 (2006-12-01), Van Treuren et al.
patent: 2003/0061020 (2003-03-01), Michael
patent: 2005/0154949 (2005-07-01), Bradford et al.

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