Test structures for silicon etching

Details Test structures for silicon etching Test structures for silicon etching

2001-01-29

2002-01-29

Bowers, Charles (Department: 2817)

Semiconductor device manufacturing: process

With measuring or testing

Electrical characteristic sensed

Reexamination Certificate

active

06342401

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to parametric test structures for integrated circuits, more particularly, this invention relates to a test structure to measure the depth of etching in resistive substrates.
BACKGROUND OF THE INVENTION
Silicon etching is being aggressively pursued in micro-machining such as with the fabrication of fluid ejection devices such as ink-jet printheads. During the fabrication of such fluid ejection devices, expensive vision tools or high cost operators are used to monitor and measure the depth of trench etch in silicon or other substrates. Manufacturers have used these visual monitoring techniques even though they are expensive and prone to error, especially when using manual labor. Further, when these visual monitoring techniques are used in high volume operations, fatigue and other human factor issues such as ergonomics must be factored into the process, thereby increasing costs. Unless an approach is found which reduces the human interaction with measuring the trench depth, costs will continue to increase making micro-machining less attractive as a new technology.
SUMMARY
A test structure determines the trench depth from etching in a resistive substrate. The test structure has a first contact and a second contact to the substrate. Between the first and second contact is disposed an etch window. A measurement of resistance between the first contact and the second contact is indicative of the depth of etching of in the etch window.


REFERENCES:
patent: 5286656 (1994-02-01), Keown et al.

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