Test structure for determining electromigration and...

Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure

Reexamination Certificate

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C257S758000, C257S774000, C374S163000, C374S164000, C324S763010, C324S765010, C438S017000, C438S018000

Reexamination Certificate

active

06897476

ABSTRACT:
According to one exemplary embodiment, a test structure for determining electromigration and interlayer dielectric failure comprises a first metal line situated in a metal layer of the test structure. The test structure further comprises a second metal line situated adjacent and substantially parallel to the first metal line, where the second metal line is separated from the first metal line by a first distance, and where the first distance is substantially equal to minimum design rule separation distance. The test structure further comprises an interlayer dielectric layer situated between the first metal line and the second metal line. According to this exemplary embodiment, electromigration failure is determined when a first resistance of the first metal line or a second resistance of the second metal line is greater than a predetermined resistance, and interlayer dielectric failure is determined when a first current is detected between the first and second metal lines.

REFERENCES:
patent: 5777486 (1998-07-01), Hsu
patent: 6293698 (2001-09-01), Alvis
patent: 6465376 (2002-10-01), Uzoh et al.
patent: 6680484 (2004-01-01), Young

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