Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2005-02-08
2005-02-08
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C257S201000, C257S304000
Reexamination Certificate
active
06853000
ABSTRACT:
A test structure for a memory cell array determines a doping region of an electrode connection that, in a memory cell, connects an inner capacitor electrode of a trench capacitor to an associated selection transistor. The test structure has an electrical contact with a predetermined contact area disposed between a regular matrix configuration of four trench capacitors.
REFERENCES:
patent: 6288558 (2001-09-01), Zimmermann et al.
patent: 20040056248 (2004-03-01), Liu et al.
patent: 101 07 081 (2001-09-01), None
Felber Andreas
Rosskopf Valentin
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