Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2006-07-11
2006-07-11
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
With measuring or testing
C438S038000, C438S060000
Reexamination Certificate
active
07074628
ABSTRACT:
A method and apparatus for identifying crystal defects in emitter-base junctions of NPN bipolar transistors uses a test structure having an NP junction that can be inspected using passive voltage contrast. The test structure eliminates the collector of the transistor and simulates only the emitter and base. Eliminating the collector removes an NP junction between collector and substrate of a wafer allowing charge to flow from the substrate to emitter if the emitter-base junction is defective since only one NP junction exists in the test structure. In one embodiment, the test structures are located between dies on a wafer and may be formed in groups of several thousand.
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Albers Bradley J.
Esry Thomas Craig
Kerr Daniel Charles
Martin, Jr. Edward Paul
Patterson Oliver Desmond
Agere Systems Inc.
Dang Phuc T.
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