Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2006-09-05
2008-08-26
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S270000, C438S680000, C257SE21170, C257SE21278, C257SE21521, C257SE21585
Reexamination Certificate
active
07416986
ABSTRACT:
A test structure for detecting void formation in semiconductor device layers includes a plurality of active device areas formed in a substrate, a plurality of shallow trench isolation (STI) regions separating the active device areas, a plurality of gate electrode structures formed across the active device areas and the STI regions, and a matrix of vias formed over the active device areas and between the gate electrode structures. At least one edge of each of a pair of vias at opposite ends of a given one of the STI regions extends at least out to an edge of the associated active device area.
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Huang Shih-Fen
Leobandung Effendi
Zhu Huilong
Cantor & Colburn LLP
International Business Machines - Corporation
Nhu David
Yaghmour Rosa
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