Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2011-08-02
2011-08-02
Dang, Trung (Department: 2892)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C257SE23179
Reexamination Certificate
active
07989804
ABSTRACT:
A test pattern structure including a first conductive layer and a second conductive layer is provided. The second conductive layer is directly disposed on the first conductive layer and connected to the first conductive layer through a plurality of connection interfaces. The test pattern structure of the present invention can detect the interconnection failure quickly and correctly without SEM identification.
REFERENCES:
patent: 5262719 (1993-11-01), Magdo
patent: 2009/0159883 (2009-06-01), Lee
Cheng Rui-Huang
Ding Yuan-Li
Han Xiao-Fei
Lee Chih-Ping
Liao Hong
Dang Trung
J.C. Patents
United Microelectronics Corp.
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