Test method for unit re-modification

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Optimization

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C716S111000, C716S136000

Reexamination Certificate

active

07930671

ABSTRACT:
The present invention described a test method for unit re-modification, in which there is a test end and a host end. The method generated a sample pattern at a test end, generates a control pattern and modifies a re-modification unit. Otherwise, an experimental pattern is generated and then whether or not the original function is retained after modifying the re-modification unit is determined according to the result of comparison of the control pattern and experimental pattern thereon. The present invention is used to test the internal function module of specific software or hardware, and ensure that the proper function is retained after re-modification.

REFERENCES:
patent: 6825887 (2004-11-01), Miller et al.
patent: 2005/0160338 (2005-07-01), Hapke

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Test method for unit re-modification does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Test method for unit re-modification, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Test method for unit re-modification will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2722498

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.