Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Optimization
Reexamination Certificate
2011-04-19
2011-04-19
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Optimization
C716S111000, C716S136000
Reexamination Certificate
active
07930671
ABSTRACT:
The present invention described a test method for unit re-modification, in which there is a test end and a host end. The method generated a sample pattern at a test end, generates a control pattern and modifies a re-modification unit. Otherwise, an experimental pattern is generated and then whether or not the original function is retained after modifying the re-modification unit is determined according to the result of comparison of the control pattern and experimental pattern thereon. The present invention is used to test the internal function module of specific software or hardware, and ensure that the proper function is retained after re-modification.
REFERENCES:
patent: 6825887 (2004-11-01), Miller et al.
patent: 2005/0160338 (2005-07-01), Hapke
Chang Dyson
Kao Daniel
Birch & Stewart Kolasch & Birch, LLP
Siek Vuthe
VIA Technologies Inc.
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