Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-12-10
1999-12-14
Palys, Joseph E.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 47, 714 48, 714718, G06F 1100
Patent
active
060031425
ABSTRACT:
A test facilitating circuit of a microprocessor has a mode register (11). If data stored in the mode register indicates a test mode, the test facilitating circuit uses a test mode function of a cache memory (1), to execute a test program written in the cache memory irrespective of the resetting of the microprocessor. The test program carries out a built-in test on internal circuits of the microprocessor. Results of the test are stored in the cache memory. After the test, an external tester reads the test results out of the cache memory and examines them.
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Kabushiki Kaisha Toshiba
Mai Rijue
Palys Joseph E.
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