Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Reexamination Certificate
2004-11-15
2010-10-05
Chu, Chris C (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Ball or nail head type contact, lead, or bond
C257SE23020, C257S758000, C257S784000, C257S786000, C327S563000
Reexamination Certificate
active
07808115
ABSTRACT:
Aspects of the present invention relate to the arrangement of points of interconnection of integrated circuit die to the package in which they are enclosed. More specifically, aspects of the present invention pertain to an arrangement of bond pads over the active circuitry of an integrated circuit die, in order to permit a reduction in size of the die. An embodiment of the present invention may place a first bond pad over the active area of an integrated circuit, wherein the first bond pad is electrically coupled to a second bond pad outside of the active area of the integrated circuit. Production and delivery of the integrated circuit may proceed using the second bond pad during packaging, in parallel with the testing of packaging using the first bond pad. When processes related to the use of the first bond pad have been proven successful and sustainable, the second bond pad may be eliminated, resulting in a reduction of the size of the integrated circuit device. This approach may be employed to save die area, increasing the number of devices that may be produced on a silicon wafer, resulting in a reduction in device cost. The approach of the present invention works well whether the chip is pad or core limited. Although reference has been made to the used of this technique on a silicon wafer, an embodiment of the present invention may be employed in the fabrication of integrated circuit device using other materials as well, without departing from the spirit and scope of the present invention.
REFERENCES:
patent: 4541067 (1985-09-01), Whitaker
patent: 6133637 (2000-10-01), Hikita et al.
patent: 6297563 (2001-10-01), Yamaha
patent: 6307271 (2001-10-01), Nakamura
patent: 6433628 (2002-08-01), Morris
patent: 6531709 (2003-03-01), Kim et al.
patent: 6762499 (2004-07-01), Nakadaira
patent: 2002/0050406 (2002-05-01), Yamashita
patent: 2003/0032263 (2003-02-01), Nagao et al.
patent: 2005/0223289 (2005-10-01), Ho
patent: 1017094 (2000-07-01), None
patent: 1294017 (2003-03-01), None
patent: 2001358169 (2001-12-01), None
Broadcom Corporation
Chu Chris C
McAndrews Held & Malloy Ltd.
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