Test circuit device for semiconductor memory apparatus

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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Details

C365S185230, C365S230060, C365S185220

Reexamination Certificate

active

07639555

ABSTRACT:
A test circuit device for a semiconductor memory device includes a main word line driving unit that generates a signal that swings between a driving voltage and one of a first voltage and a second voltage in response to a main decoding signal and a test mode signal, a local driving unit that generates a signal that swings between the driving voltage and one of the first voltage and the second voltage in response to a local decoding signal and the test mode signal, a driving voltage supplying unit that receives an output of the local driving unit and the test mode signal to supply a voltage that swings between the driving voltage and the first voltage, and a sub-word line driver that receives an output of the main word line driving unit and an output of the driving voltage supplying unit to determine whether the sub-word line is enabled or not.

REFERENCES:
patent: 5811815 (1998-09-01), Marshall et al.
patent: 6236617 (2001-05-01), Hsu et al.
patent: 09-134592 (1997-05-01), None

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