Test circuit and test method for semiconductor memory

Details Test circuit and test method for semiconductor memory Test circuit and test method for semiconductor memory

1997-10-01

2000-10-17

Nelms, David

Static information storage and retrieval

Read/write circuit

Testing

36523008, G11C 700

Patent

active

061341614

ABSTRACT:
A logic IC including an embedded memory is provided with a test circuit therein which allows the embedded memory to be tested by using only three additional external pins of the logic IC for test purposes without regard to the bit count of a unit in which data is written into or read out from the embedded memory. In addition, the embedded memory can be tested by adopting a method that requires a period of testing time shorter than the related art one.

REFERENCES:
patent: 5511029 (1996-04-01), Sawada et al.
patent: 5579272 (1996-11-01), Uchida

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