Test circuit

Details Test circuit Test circuit

1997-03-04

1997-12-30

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Testing

365200, 371 211, G11C 1300

Patent

active

057038180

ABSTRACT:
It is an object to provide a test circuit which properly finds faults of memory cells of a storage circuit. Registers XB1, 0, YB1, 0 of a circuit SGC1 supply address data which includes four order all cycle sequence. A generating portion 10a provides "1" when data XB1, 0 are "10" and provides "0" in other cases. A generating portion 11a provides "1" when data XB1,0 are "01" and provides "0" in other cases. One of the outputs of the generating portions 10a, 11a is selected with the data YB1 and a selector S and provided to a RAM 1 as data DI. In the RAM 1, one of word lines is selected by X address data and data of memory cells MC are applied onto bit lines bit 0-3. With this structure, the logic on the bit line selected by the Y address data changes from "0" to "1" or from "1" to "0".

REFERENCES:
patent: 5351213 (1994-09-01), Nakashima

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