Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2000-12-01
2002-04-30
Bowers, Charles (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C324S765010, C324S762010, C438S015000
Reexamination Certificate
active
06380557
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a test chip for molding material including fillers and a method for evaluating the molding material by using the test chip.
2. Description of the Related Art
At the very last stage of a process of manufacturing semiconductor chips, a semiconductor chip is molded with a molding material. The molding material is formed of resin with minimum chips of silica glass, which are generally called “fillers”.
During the very last stage of the manufacturing process, it is well known that characteristics of a transistor of the semiconductor chip are deteriorated or that a gate oxide layer of the transistor is destroyed by the fillers because the fillers mechanically damage the surface of the semiconductor chip. Specifically, with an increase in the level of integration of semiconductor chips, a part of circuit patterns should be formed under terminal pads and the distance between the terminal pads should become short, Therefore, the problems caused by the fillers become more seriously because the fillers are stacked between the pads.
To avoid the problems described above, several proposals have been made. For example, forming a thick final passivation layer, forming a wafer coat layer between the final passivation layer and the resin, and developing a low stress resin are proposed. However, since the damage caused by the filler is varied, depending on the resin's manufacture and kinds of circuit structures formed on the semiconductor chips, these proposals are insufficient to resolve the problems described above.
Therefore, it is necessary to test the resin itself to evaluate how and what influences of fillers in resin are given to the semiconductor chip, so that the most appropriate resin can be used for each semiconductor chip in accordance of the test result of the resin itself. To perform the resin test, it is necessary to form a test circuit somewhere on the semiconductor chip. However, if a test circuit is formed somewhere on the semiconductor chip to evaluate the influence of the fillers, the filler does not always stay on the test circuit, and it is almost impossible to predict where the fillers are located on the semiconductor chip. Therefore, a test for the resin could not be performed effectively.
SUMMARY OF THE INVENTION
An objective of the invention is to capture fillers at the specific location on a test circuit easily and effectively to evaluate how and what influences of fillers in resin are given to the semiconductor chip. Further, another objective of the invention is to show the result of the evaluation quantitatively. To evaluate the influences, many test chips having different structure, many test chips formed by different steps, and many kinds of resin having different amount of fillers are prepared. By using these different materials to the different test chips, the result of the evaluation can be shown in a quantitative form.
These objectives are achieved by providing a test chip for a molding material including fillers, including, a semiconductor substrate, a test circuit formed on the substrate, the test circuit including at least one transistor, and two dams formed on the substrate for providing a slit therebetween, the slit capturing the fillers of the molding material when the molding material is applied to the test circuit.
Further, these objectives are achieved by providing a method for testing a molding material including fillers for a semiconductor device, including steps of preparing a test chip including a semiconductor substrate, a test circuit formed on the substrate, which includes at lease one transistor, and two dams formed on the substrate for providing a slit therebetween, placing the test chip in molding equipment, injecting the molding material including fillers into the molding equipment, capturing the fillers in the slit, and detecting the influence of the fillers on electrical characteristics of the test chip using the test circuit.
REFERENCES:
patent: 5149662 (1992-09-01), Eichelberger
patent: 5907190 (1999-05-01), Ishikawa et al.
patent: 6114627 (2000-09-01), Moden
patent: 6274397 (2001-08-01), Chien et al.
J. Wu et al., “Evaluation and Characterization of High-Performance Filling Encapsulants for System Chips Application,” Proceedings of the 2000 Electronic Components and Technology Conference, pp. 937-943, Sep. 2000.
Bowers Charles
Mimura Junichi
Oki Electric Industry Co. Ltd.
Smoot Stephen W.
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