Test apparatus, program, and test method

Details Test apparatus, program, and test method Test apparatus, program, and test method

2007-04-13

2010-02-02

Ellis, Kevin L (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S722000, C714S724000, C365S201000, C324S765010

Reexamination Certificate

active

07657801

ABSTRACT:
There is provided a test apparatus that tests a device under test. The test apparatus includes an address generating circuit that generates a physical address to be supplied to a memory block inside the device under test, a plurality of mask registers being provided in correspondence with a plurality of memory input bits constituting at least a part of a memory input address to be supplied to the device under test, where the plurality of mask registers set values indicating whether a plurality of physical bits constituting the physical address is masked every the physical bit, a plurality of mask arithmetic circuits being provided in correspondence with each of the plurality of memory input bits, where the plurality of mask arithmetic circuits respectively mask the physical address in accordance with the value of the mask register corresponding to this memory input bit, a plurality of logical operation circuits being provided in correspondence with each of the plurality of memory input bits, where the plurality of logical operation circuits respectively output bit data obtained by performing a predetermined logical operation on a masking result by the mask arithmetic circuit as the memory input bit, and an address supplier that supplies the input address including the plurality of memory input bits output from the plurality of logical operation circuits to the device under test.

REFERENCES:
patent: 4958345 (1990-09-01), Fujisaki
patent: 4958346 (1990-09-01), Fujisaki
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patent: 5644578 (1997-07-01), Ohsawa
patent: 6032281 (2000-02-01), Fujisaki
patent: 6154862 (2000-11-01), Tabata et al.
patent: 6601204 (2003-07-01), Tsuto
patent: 6687861 (2004-02-01), Jordan et al.
patent: 2001/0054141 (2001-12-01), Snodgrass et al.

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