Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Distributive type parameters
Reexamination Certificate
2002-07-30
2004-07-06
Hirshfeld, Andrew H. (Department: 2854)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Distributive type parameters
C324S084000, C324S095000, C324S1540PB, C324S543000, C324S759030, C324S763010
Reexamination Certificate
active
06759854
ABSTRACT:
FIELD OF THE INVENTION
The present invention refers to the testing of devices under test and particularly to the simultaneous testing of a plurality of devices under test.
BACKGROUND OF THE INVENTION AND PRIOR ART
FIG. 2
shows a typical diagram of a test setup for testing a device under test or a device under test (DUT), which can for example be an integrated circuit. The setup consists of a system
200
with an output
210
for a test signal. The test signal is transmitted via a signal line
220
to an input
230
of a device under test, which can be an integrated circuit, for example. In response to the test signal of the test system
200
transmitted via signal line
220
, the device under test provides a result signal at an output
214
, that can either be received with the test system
200
or with another analytical instrument (not shown in FIG.
2
).
It is the disadvantage of the system illustrated in
FIG. 2
, that only one device under test
250
can be measured at a time. When a high throughput is desired, this leads to the fact that either many expensive test systems have to be purchased, or that the test time has to be decreased, which can affect the test quality.
FIG. 3
shows a known possibility for increasing the test throughput with the same number of test systems. The test system
200
is again coupled to the signal line
220
with its test signal output
210
, the signal line
220
having a characteristic wave impedance of 50 &OHgr;, for example. The signal line
220
is not directly coupled to an input of a device under test as in
FIG. 2
, but is coupled to a first line
300
. To increase the throughput, two devices under test (DUT
1
and DUT
2
) will be connected to a line
300
. As it is shown in
FIG. 3
, a so called L-configuration is used, such that device under test DUT
1
is directly connected to line
300
, while a second line
320
is attached directly before an input
310
of device under test DUT
1
or immediately at the input
310
of device under test DUT
1
, and an input
330
of the second device under test DUT
2
is electrically connected to the second line.
The concept shown in
FIG. 3
can basically be extended for any number of devices under test (DUT
1
. . . DUTn). The signal of a tester channel will thus be lead to two or more components to be tested to test with limited channel number of the test system as many components as possible.
It is a disadvantage of the system in
FIG. 3
, that the signal rise time of a test signal is decreased. This is due to the reflection of a signal at the input
330
of the DUT
2
. Typically, the inputs of an integrated circuit to be tested have a high impedance. This means that a wave propagating on the first line
300
designated by a row
350
a
does not notice the input
310
of device under test
1
, but propagates along the second line
330
, since both the first line and the second line have a characteristic wave impedance of 50 &OHgr;. The propagation of the wave along the second line
320
is illustrated by arrow
350
b.
However, the 50-&OHgr;-line
320
matched to the signal line is ending at the input
330
of the device under test. This means that a total reflection of the wave occurs at the high impedance input
330
of the second device under test, as it is illustrated by arrow
350
c.
The totally reflected wave superimposes on the first line
300
of the propagating wave. The back propagating wave, i.e. the totally reflected wave on line
300
, is symbolically illustrated by arrow
350
d.
With regard to the voltage amplitude at the input of the first device under test this has the following effects. First, when the wave
350
a
propagates to the device under test
1
, half of the programmed amplitude is applied to device under test
1
. When then the wave
350
c
reflected from the input
330
of the second device under test reaches the input of device under test
310
again, propagating and back propagating waves superimpose, so that the amplitude at the input of the first device under test reaches the programmed value. The time wave form of the signal applied to the input
310
of the first device under test thus corresponds to a staircase curve. Due to the half amplitude of the propagating wave that is not yet superimposed with the totally reflected wave unwanted conditions occur at the input of device under test
310
, since the amplitude of the propagating wave is in proximity to the switching threshold of the device under test. Only when the totally reflected wave is at the input
310
, the fully programmed amplitude will be achieved. This staircase curve leads immediately to unwanted results of the first device under test DUT
1
, i.e. DUT
1
might be detected as defective although it is alright. It should be noted, that the staircase curve is only visible with a certain timely resolution when the subline
320
has a certain length. With smaller lengths, the staircase curve is smoothed to a flatter rising edge.
Thus, in the so called L-shared-solution shown in
FIG. 3
significant signal distortions occur at the component inputs with regard to amplitude and rise time that make testing with defined wave forms more difficult or even impossible, and typically lead to a much too high number of fail results, respectively, although these devices under test function correctly and would have “deserved” a “pass”.
To avoid these reflection problems the usage of a passive resistor network could be considered. This, however, reduces the voltage amplitude and therefore restricts the useable amplitude area of the tester. Above that, by the imposed necessary connection to a signal mass, a leakage current measurement at the inputs of devices under test becomes impossible.
SUMMARY OF THE INVENTION
It is the object of the present invention to provide a test apparatus as well as a method for transmitting a test signal to devices under test, that lead to more accurate test results and particularly provide more accurate statements about the fact whether a device under test is alright or defective.
In accordance with a first aspect of the invention, this object is achieved by a test apparatus for testing devices under test, comprising: an input for receiving a test signal from a test signal source, wherein a signal line with a predefined characteristic wave impedance is connectable to the input; branching means with a first and a plurality of second terminals, the first terminal being connected to the input; and a plurality of distribution lines, each distribution line of the plurality of distribution lines being connected to one of the plurality of second terminals on the input side, and wherein one of the devices under test is connectable to each distribution line on an output side, wherein each distribution line has a characteristic wave impedance which is substantially equal to a product of the predefined characteristic wave impedance and the number of distribution lines.
In accordance with a second aspect of the invention this object is achieved by a method for transmitting a test signal to devices under test, comprising: receiving a test signal from a signal line having a predefined characteristic wave impedance; branching the testing signal into a number of branching signals; transmitting the branching signals via a number of distribution lines, wherein each distribution line has a characteristic wave impedance that is substantially equal to a product of the predefined characteristic wave impedance and the number of distribution lines.
The present invention is based on the knowledge that for increasing the throughput on the one hand more devices under test have to be connected to a test system, and that, on the other hand, a matching has to be carried out at the branching point where the test signal of the test system is divided into several test signals to the several devices under test, so that no reflection problems will be caused. The inventive test apparatus comprises an input for receiving a test signal from a test signal source, wherein a signal line with a predetermined characteristic
Chau Minh
Greenberg Laurence A.
Hirshfeld Andrew H.
Infineon Technologies
Mayback Gregory L.
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