Termination switching based on data rate

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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Details

C326S028000, C365S189050, C365S206000, C365S233130

Reexamination Certificate

active

07746098

ABSTRACT:
Embodiments of the invention are generally related to systems comprising devices connected by a bus. A device in the system may include termination control logic capable of detecting changes in the system clock frequency. Upon detecting a clock frequency, the termination control logic may determine whether the clock frequency is greater than a threshold frequency. If so, the termination control logic may enable bus termination. However, if the new clock frequency is lower than the threshold frequency, bus termination may be disabled, thereby conserving power.

REFERENCES:
patent: 6807650 (2004-10-01), Lamb et al.
patent: 2003/0206164 (2003-11-01), Juenger
patent: 2003/0235107 (2003-12-01), Jang
patent: 2004/0201402 (2004-10-01), Rajan et al.
patent: 2008/0183956 (2008-07-01), Mayer et al.

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