Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-07-03
2003-09-16
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S341000, C257S490000, C257S492000, C257S494000
Reexamination Certificate
active
06621122
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to semiconductor devices and more specifically relates to a termination structure for a superjunction type MOS-gated device.
BACKGROUND OF THE INVENTION
MOSgated superjunction devices are well known and employ, for example, for an N channel device, an active region consisting of a plurality of very deep parallel and spaced P type concentration columns (sometimes called pedestals or pylons), in an N type body of epitaxially deposited silicon. A conventional MOSgate structure permits or prevents current flow through a channel region at the top of each column to connect a top source contact to the N body or drift region. The total charges, as determined by the concentrations and dimensions of the P type columns and N type body are balanced, so that both deplete in the blocking condition. This permits the N concentration in the drift region which carries forward current during forward conduction to be increased above that of conventional MOSgated devices, thus reducing on resistance.
The termination structure for such devices is commonly made of further P columns or pylons which extend out toward the edge or street of the die. These termination pylons underlie a conductive field plate atop a field oxide over the pylons, which field plate is an extension of the source contact.
It would be desirable to optimize the termination design to keep the electric field distribution constant in the termination region.
BRIEF DESCRIPTION OF THE INVENTION
In accordance with a first feature of the invention, the field plate edge which commonly extends over the outermost termination P columns (relative to the die center) is terminated at a position between the edge of the active region and the outer edge of the termination region. This is a desired position because the field plate is at the zero voltage potential of the source electrode.
In accordance with a second feature of the invention, the size and/or spacing (diameter, or total cross-sectional area) of the P pylons in the termination area is made larger than those in the active area. Thus, based on Gauss's Law, the net charge in the active area of a superjunction device must be balanced to achieve a flat electrical field distribution. However, in accordance with the invention, in the termination region the net P pylon charge is made negative at the full depletion condition. To apply this concept to the termination design, the P column size in the termination region may be made bigger than the P column size in the active area. For example the P column size in the termination is increased from 5 &mgr;m to 10 &mgr;m (mask size). Other techniques can be used.
In accordance with a third feature of the invention, the locations of the P columns in the termination area is non-uniform. Thus, when the P column area in the termination region increases, the electrical field in the termination can be effectively reduced. But this reduced electrical field will have some local distortion if the P columns are uniformly distributed. To smooth the field distortion, it is preferable to position the P columns in such a way as to maintain the net charge N(r) so that it satisfies the following equation:
N
(
r
)≈1/
r
By using these design concepts, the whole termination structure may be optimized.
REFERENCES:
patent: 6441455 (2002-08-01), Dutta
patent: 6498368 (2002-12-01), Sakamoto et al.
International Rectifier Corporation
Jackson Jerome
Ostrolenk Faber Gerb & Soffen, LLP
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