Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – With inversion-preventing shield electrode
Reexamination Certificate
2001-07-03
2002-10-29
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
With inversion-preventing shield electrode
C257S314000, C257S315000, C257S723000
Reexamination Certificate
active
06472722
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor process, specifically, to a novel termination structure for power MOS devices so as to prevent leakage current.
BACKGROUND OF THE INVENTION
Doubled diffused metal-oxide-semiconductor field effect transistor (DMOSFET), insulated gate bipolar transistor (IGBT), and Schottky diode are important power devices and use extensively as output rectifiers in switching-mode power supplies and in other high-speed power switching applications. For example, the applications include motor drives, switching of communication device, industry automation and electronic automation. The power devices are usually required carrying large forward current, high reverse-biased blocking voltage, such as above 30 volt, and minimizing the reverse-biased leakage current. There are several reports that trench DMOS, trench IGBT and trench Schottky diode are superior to those of with planar structure.
Among the power device, the IGBT is the most commercially devices. Typical trench IGBT power device is illustrated in
FIG. 1
, a schematic cross-sectional view. In the figure, a substrate is shown which comprises a p type doping semiconductor substrate
10
having an collector electrode
11
on an opposite face thereof and a n+ buffer region
13
, an n-drift region
14
sequentially deposed thereon. In addition, n-drift regions
14
having a p-well region
15
deposed thereon. A trench gate structure has a gate oxide layer
16
therein and a bottom deeply formed into n-drift region
14
of the substrate and, an insulting layer
17
is formed to isolate the conductive layer
18
from the emitter electrode
19
. The emitter electrode
19
contacts to the n+ regions and p+ regions. Both regions are in the pitch of trench gate structure and on the p-diffused well regions
15
. The p-type substrate
10
, the n-type buffer
13
and drift regions
14
, and p diffused well region
15
collectively form the collector, base and emitter of a vertical p-n-p bipolar transistor.
For power transistors are concerned, the described power device for carrying large current are susceptible to premature breakdown because the p-diffused well region do not form semi-infinite parallel -plane p-n-junction with the drift region. It is required to consider the edge effects to obtain realistic design. Hence a termination structure design in the periphery of the active region is usually at an end of a die so as to prevent voltage breakdown phenomena from premature.
FIG.2A
shows a planar diffused termination. In the case, the electric field (indicated by arrows) crowding are expected to occur at the edge of cylindrical junction
30
. Hence, the breakdown of planar diffused junction would be occurred at edge rather in the parallel-plane portion.
FIG. 2B
shows a field ring
31
fabricated simultaneously with a main junction
32
of a power device. In the case, the electric field (indicated by arrows) and depletion field contour
33
are shown. Comparison of electric field crowding of
FIG. 2B
with
2
A, it cab be seen that the electric field crowding responsible for the premature breakdown voltage is substantial reduced by the presence of field ring region
31
.
FIG. 3
shows another sort of field plate
42
termination structure. In the figure, a main junction
40
and a field plate
42
formed on an insulating region
41
. A depletion layer
45
indicated by a dotted line may be generated in the substrate
35
. Similarly to field ring structure, the presence of the field plate
42
may be able to support a breakdown voltage in a range of about 60% of the ideal breakdown voltage of a parallel-plane junction. In the case, if the insulating layer
41
is thick, breakdown will typically occur in region “A”, however if the insulating layer
41
is thin then breakdown will typically occur in region “B”.
Since a single field plate and a field ring can reduces depletion layer curvature and electric field crowding. It can be expected that several field plate and field rings working in conjunction with each other may raise the breakdown voltage even closer to the parallel plane case.
FIG. 4
shows such forging concept application, a termination design with multiple field plates
50
and field rings
60
A,
60
B, and
60
C. In the case, the spacing s
1
, s
2
, and s
3
between individual floating filed plate
50
and the width w
1
, w
2
, w
3
of each field rings
60
A,
60
B and
60
C are varied. Both spacing and width are decreased with increasing distance with main junction
55
. If the surface space chares are precisely known, the spacing and width can be aptly selected, the depletion boundary
65
is as illustrated in the figure.
Recently, to prevent low breakdown voltage, another approaching is proposed by Seok in the U.S. Pat. No. 5,731,627 issued on Mar. 24, 1998. In the reference, see
FIG. 5
, the termination structure comprises overlapping floating field plates. They include a primary field plate
76
a
and a plurality of floating field plates
76
b
,
76
c
,
76
d
which are formed on an electrically insulating region
66
and capacitively coupled together in series between an active region of a power semiconductor device and a floating field ring
72
b.
As forgoing several conventional termination structures, though solve the electric field crowding problems at the edge so that the premature breakdown voltage are substantial improved. However, they usually demands long termination length and hence spend much planar area. An object of the present invention thus proposes a novel termination structure. With the new termination structure the bending region of the depletion region are away from the active region without long termination length, and thus save much planar area.
SUMMARY OF THE INVENTION
The present invention discloses a termination structure method for IGBT power devices and a method making the same. A power device termination structure is disclosed. The structure comprises a primary field plate electrically connect to a main junction, a secondary field plate electrically connect to a field ring which are apart from the main junction, and a floating field plate formed in between the primary field plate and secondary field plate. The primary field plate and secondary field plate are formed on an insulating layer, and the floating field plate is buried in the insulating layer. The endings of floating field plate are in alignment with the ends of the extension portion of the primary field plate and the secondary field plate. The primary field plate, the secondary field plate and the floating conductive plate, are capacitively coupled each other so that the electrical field crowding problem is lesser. Since the termination structure requires only a floating field plate in conjunction with a primary field plate and a secondary field plate and hence reduces significantly the termination area.
REFERENCES:
patent: 4766474 (1988-08-01), Nakagawa et al.
patent: 4926243 (1990-05-01), Nakagawa et al.
Blakely , Sokoloff, Taylor & Zafman LLP
Industrial Technology Research Institute
Wojciechowicz Edward
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