Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2002-02-01
2004-06-01
Tran, Anh (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S032000, C326S033000, C326S034000
Reexamination Certificate
active
06744275
ABSTRACT:
FIELD OF THE INVENTION
This invention generally relates to impedance matched termination pairs coupled to a differential signaling input output circuit. More particularly one aspect of this invention relates to variable-impedance matched termination pairs.
BACKGROUND OF THE INVENTION
Low Voltage Differential Signaling (LVDS) is a signaling method used for high-speed transmission of binary data over copper. Typically, Low Voltage Differential Signaling uses a lower voltage swing than other transmission standards in order to deliver higher data transmission speeds at lower power consumption.
A differential signal represents a value as the difference between two physical quantities. In a strict sense, all voltage signals are differential, as a voltage can only be measured with respect to another voltage. In some systems, the reference against which a voltage is measured is the system ‘ground’. Signaling schemes in which use ‘ground’ as the voltage measurement reference are called single-ended. This term is used because signals are represented by a voltage on a single conductor.
On the other hand, two conductors carry a differential signal. The signal value is the difference between the individual voltages on each conductor.
FIG. 1
illustrates a differential signal composed of two parts arbitrarily referred to as the positive signal V+ and the negative signal V−. The positive signal and the negative signal are ideally approximately opposite in phase with each other. As one goes up, the other goes down—but their average position, a 2.5 volt voltage level with respect to ground, remains the same. Further, the information transmitted in the differential signal is typically the voltage difference, sometimes referred to as signal value, between the positive signal and the negative signal. Mathematically, the signal value may be represented by V+ minus V−.
FIG. 1
illustrates a sinusoidal type wave, nonetheless, the same principals apply for square waves as well.
Electrically, a pair of wires labeled V+ and V− carry the two parts of the differential signal. Typically, an LVDS driver converts a TTL/CMOS signal into a low-voltage differential signal. This differential signal can travel at rates such as 655 Mbps over media such as copper cables or printed circuit board traces to a LVDS receiver. The receiver then translates the differential signal back into a TTL/CMOS signal.
The first benefit of differential signaling is that because you are controlling the ‘reference’ voltage, smaller signals can be easily discriminated. In a ground-referenced, single-ended scheme, the exact value of the measured signal depends on the consistency of ‘ground’ within a system. The further apart the signal source and the signal receiver are, the greater the likelihood that discrepancy exists between the values of their local grounds. However, with LVDS, the values and characteristics of a matched termination pair resistors control the consistency of the difference value between the signals. Therefore, the better matched the termination pair is for the entire differential signal, the better the system can discern information with the smaller signals.
General purpose LVDS technology addresses point-to-point physical layer interfaces. These include intra-system connections via printed circuit board traces or cables. The ultimate rate and distance of LVDS data transfer is dependent on the attenuation characteristics of the media, the noise coupling to the environment, and the proper impedance terminations of the matched impedance termination pair. An improperly impedance termination may result in reflection waves and mode conversion.
FIG. 2
illustrates a schematic diagram of prior art technique of using a matched termination pair for a low voltage differential signaling circuit. The circuit contains a first common mode matched resistor, a second common mode matched resistor, a third resistor (Rp), an output of the V+ bus, an output of the V− bus, and a power supply. Commonly, a pair of common mode matched resistors are used to simultaneously match the differential mode impedance value and the common mode impedance value of a differential signal bus. Each common mode resistor is selected to the common mode impedance value, Ze resistance. Each common mode resistor connects to the power supply, Vcc, and the resistor Rp having its resistance equal to 2*{Ze*Zo/(Ze−Zo)}, where Zo is the differential mode impedance value of the bus to the differential signal. Resistor Rp also connects between the two signal buses (V+ and V−) of the differential signaling pair. However, because resistor Rp connects the two signal buses of the pair, the steady-state and the common mode levels of the differential signal pair may be shifted and the differential signal swings can be severely reduced. These effects can degrade the common-mode level of the signals, the noise margin, and thus the signal integrity for the receivers. Further, the differential mode impedance value of the bus and the common mode noise may not be taken into account, which can cause signal integrity to degrade through generation of reflected waves.
REFERENCES:
patent: 5559448 (1996-09-01), Koenig
patent: 6418500 (2002-07-01), Gai et al.
patent: 0 969 633 (2000-01-01), None
patent: PCT-WO 00/65788 (2000-11-01), None
patent: PCT/US 03/02170 (2003-06-01), None
Mehdi M. Mechaik, “An Evaluation of Single-Ended and Differential Impedance in PCBs”, IEEE, 0-7695-1025-6/01, 2001, pp. 301-306.
“Low Voltage Differential Signaling (LVDS) Technology: The Basics”, Texas Instruments web-page news release, Semiconductor News and Publications, Http://www/ti.com/sc/docs
ews/1998/98068b.htm, Copyright 2000, 5 pages.
“FAQ: What is a differential signal?”, Lattice Semiconductor Corporation web-page, http://www.latticesemi.com/support/faq/FAQ_ispPAC15.cfm, Nov. 28, 2001, 3 pages.
William J. Dally, “Modeling and Analysis of Wires”, Digital Systems Engineering, Published 1998, pp. 110, 111, 200, 201, and 202.
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