Termination for trench MIS device having implanted...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S334000, C257S341000, C257S394000

Reexamination Certificate

active

06927451

ABSTRACT:
A trench MIS device is formed in a semiconductor die that contains a P-epitaxial layer that overlies an N+ substrate and an N-epitaxial layer. In one embodiment, the device includes a drain-drift region that extends from the bottom of the trench to the N-epitaxial layer. A termination region of the die includes a half-trench at an edge of the die and an N-type region that extends from a bottom of the half-trench to the substrate. An insulating layer and an overlying metal layer extend from the surface of the epitaxial layer into the half-trench. Preferably, the elements of the termination region are formed during the same process steps that are used to form the active elements of the device.

REFERENCES:
patent: 5614751 (1997-03-01), Yilmaz et al.
patent: 5723891 (1998-03-01), Malhi
patent: 6236099 (2001-05-01), Boden, Jr.
patent: 6388286 (2002-05-01), Baliga
patent: 6396090 (2002-05-01), Hsu et al.
patent: 6621121 (2003-09-01), Baliga
patent: 6700158 (2004-03-01), Cao et al.
patent: 2004/0004238 (2004-01-01), Qu

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