Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
1999-05-21
2001-05-15
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S086000, C326S027000
Reexamination Certificate
active
06232792
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to buses and more particularly to termination of buses for use in information processing systems.
2. The Background Art
Description of the Related Art
In computer and information processing systems, various integrated circuit chips communicate digitally with each other over a common bus. The signal frequency at which this communication occurs can limit the performance of the overall system. Thus, the higher the communication frequency, the better. The maximum frequency at which a system communicates is a function not only of the time that it takes for the electromagnetic wavefronts to propagate on the bus from one chip to another, but also of the time required for the signals to settle to levels that can be recognized reliably at the receiving bus nodes as being high or low, referred to as the settling time.
The length of the settling time is a function of the amount of reflection and ringing that occurs on the transmission line. The more effective the termination of a bus system, the smaller the effects of reflection and ringing in the system and the shorter the overall settling time of the signal.
SUMMARY OF THE INVENTION
An information handling system is disclosed herein. The system includes at least one system transmission line having a characteristic impedance and a plurality of clusters, each cluster being coupled to each other cluster through at least one of the system transmission lines. Each cluster comprises at least one cluster transmission line each having a characteristic impedance equal to the characteristic impedance of the system transmission lines, each of the cluster transmission lines having a first end coupled to at least one of the system transmission lines and a second end coupled to a circuit chosen from the following: an active driver, an on-chip terminator, an off-chip terminator, an inactive driver in a termination configuration; each driver having a pull-up circuit having an output resistance matching the characteristic impedance of the cluster transmission lines.
A method for operating the system provided herein includes designating one of the drivers as an active driver, designating each driver other than the active driver as a terminating driver, causing each terminating driver to be configured in a nonactive pull-up terminating configuration; and causing the active driver to drive a signal onto the transmission line to which the active driver is connected.
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Le Don Phu
Sierra Patent Group Ltd
Sun Microsystems Inc.
Tokar Michael
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