Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2006-07-13
2009-12-29
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
Reexamination Certificate
active
07639038
ABSTRACT:
A terminal resistance adjusting method adjusts a terminating resistance within a semiconductor integrated circuit. The method includes obtaining a comparison result by comparing a reference voltage and a voltage of a first node that is coupled to a first voltage via a current supply circuit, the first voltage being one of a power supply voltage and a ground voltage, controlling a monitoring resistor part which has a plurality of first resistors when making a calibration, so as to selectively couple the first resistors in parallel between the first node and a second voltage based on the comparison result, the second voltage being the other of the power supply voltage and the ground voltage, and controlling a terminating resistor part which has a plurality of second resistors when controlling the terminating resistance of the terminating part, so as to selectively couple the second resistors in parallel between a second node and the second voltage based on the comparison result similarly to the first resistors of the monitoring resistor part.
REFERENCES:
patent: 2004/0090239 (2004-05-01), Ikeoku et al.
patent: 2004/0169525 (2004-09-01), Kerr
patent: 2005/0134304 (2005-06-01), Lee
patent: 2003-143002 (2003-05-01), None
Koga Makoto
Nemoto Yutaka
Ogawa Yoshimasa
Yanagawa Miki
Arent & Fox LLP
Fujitsu Microelectronics Limited
Tabler Matthew C
Tan Vibol
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