Temperature programmable timing delay system

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

06631503

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the field of integrated circuit (IC) design. Specifically, it relates to a temperature programmable timing delay system whose timing delay or clock frequency is temperature dependent.
BACKGROUND OF THE INVENTION
The effects of temperature on integrated circuits and systems can significantly affect the operational characteristics of such circuits and systems. The primary reason is that solid state devices behave differently at different temperatures. For example, when the on-chip temperature increases or decreases from room temperature, the electrical characteristics of the chip's solid state devices change significantly, such as threshold voltage, wiring/contact resistance, electron mobility, etc., as compared to the same characteristics at room temperature. Accordingly, it is well known that a circuit designed to operate at optimum at a specific temperature range will generally not operate effectively or desirably at different temperature ranges, especially, at very high and very low temperature ranges.
For example, when the on-chip temperature of a central processing unit (CPU) increases, especially, when the CPU is operating in its active mode, the temperature independent timing delay or clock frequency of the CPU's clock circuit may deem the CPU undesirable to operate. This is because, the high on-chip temperature causes the timing delay of the clock circuit to increase, since the clock circuit is operated at a constant frequency which is independent of temperature. As a consequence, the processing speed of the CPU is noticeably affected. However, when the on-chip temperature decreases, or when the CPU is in its low-power mode, the constant frequency of the clock circuit may be unnecessarily too fast, thereby resulting in high power consumption.
To adjust for the increase in the timing delay when the on-chip temperature increases, it is desirable to operate the clock circuit at a higher frequency. And to prevent high power consumption when the on-chip temperature decreases, it is desirable to operate the clock circuit at a lower frequency. Accordingly, there is a need for timing delay system, or clock generator, whose frequency can be automatically adjusted as the on-chip temperature changes.
SUMMARY
It is an objective of the present invention to provide a temperature programmable timing delay system whose timing delay or clock frequency is temperature dependent.
It is another objective of the present invention to provide a timing delay system whose timing delay is temperature independent, but the timing delay is capable of being adjusted according to the on-chip temperature via an on-chip digital temperature sensor.
Another objective of the present invention is to provide a timing delay system whose timing delay can be automatically adjusted by the on-chip temperature using a predetermined function or look-up table correlating the on-chip temperature with a respective timing delay.
Yet, another objective of the present invention is to provide a timing delay system having a built-in-self-test capability for setting the adjustment range of the system by the on-chip temperature.
Finally, another objective of the present invention is to provide a timing delay system which allows users to program the delay-temperature relationship of the system.
In particular, the present invention provides a temperature programmable timing delay system utilizing circuitry for generating a band-gap reference and for sensing the on-chip temperature of an integrated circuit chip. The circuitry outputs the sensed temperature as a binary output which is received by a programmable table circuit of the timing delay system. The programmable table circuit outputs a binary output corresponding to the received binary output. The timing delay system further includes a temperature dependent timing delay circuit having inputs for receiving the binary output of the programmable table circuit and an output for outputting a timing delay signal for delaying a clock by a timing delay corresponding to the binary output of the programmable table circuit. The band-gap reference can be a temperature independent band-gap reference voltage having a constant-voltage value or a temperature dependent band-gap reference current having a constant-current value.
The present invention also provides a method for varying a characteristic of a timing delay signal in accordance with variations of the on-chip temperature of an integrated circuit chip. The method includes the steps of generating a reference parameter; sensing the on-chip temperature of the integrated circuit chip by utilizing at least the reference parameter; providing the sensed on-chip temperature as a binary reading; using the binary reading for providing a respective binary code indicating a timing delay; and varying the characteristic of the timing delay signal, such as the signal's rise time, in accordance with the binary code.


REFERENCES:
patent: 5838578 (1998-11-01), Pippin
patent: 6055489 (2000-04-01), Beatty et al.
patent: 6101106 (2000-08-01), Shi

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