Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1979-05-09
1981-02-17
Griffin, Robert L.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358155, 358158, H04N 504
Patent
active
042518334
ABSTRACT:
A television phase-lock (AFPC) loop is used to maintain a horizontal oscillator in synchronism with horizontal synchronizing signals in the presence of noise. The AFPC loop includes a phase detector and a controlled oscillator. The synchronizing signals are applied to one input of the phase detector and the oscillator output is applied to the other phase-detector input. The phase-detector output is coupled back to the oscillator control input to maintain the oscillator output in frequency synchronism. During the vertical synchronizing and equalizing pulse intervals, the synchronizing signals applied to the AFPC phase detector increase in frequency. The increase in frequency may decrease the AFPC loop gain or unsynchronize the loop. This effect is overcome by providing a second output from the horizontal oscillator at a frequency higher than, but related to the frequency of the desired output, and using the higher frequency to drive the phase detector. A phase ambiguity results from the higher-frequency control. The phase ambiguity is resolved by a controlled switch which couples the high-frequency oscillator output to the phase detector during the vertical synchronizing and equalizing pulse intervals and couples the desired oscillator output signal to the phase detector input at other times.
REFERENCES:
patent: 3688037 (1972-08-01), Ipri
patent: 3846584 (1974-11-01), Itoh
patent: 3878335 (1975-04-01), Balaban
patent: 3990107 (1976-11-01), Hanma
patent: 4093963 (1978-06-01), Uchida
patent: 4144544 (1979-03-01), Fernsler
patent: 4144545 (1979-03-01), Fernsler
Fernsler Ronald E.
Willis Donald H.
Brinton Yorks, Jr. W.
Griffin Robert L.
Masinick Michael A.
Meise William H.
RCA Corporation
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