Techniques for reducing redundant element fuses in a dynamic ran

Details Techniques for reducing redundant element fuses in a dynamic ran Techniques for reducing redundant element fuses in a dynamic ran

1997-06-30

1998-11-03

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Bad bit

3652257, G11C 700

Patent

active

058319174

ABSTRACT:
A memory array having a first plurality of fuse-sharing redundant elements for replacing defective elements of the memory array. The memory array includes a first fuse, and first group of redundant elements of the first plurality of fuse-sharing redundant elements. The first group of redundant elements share the first fuse as their highest order address fuse. The memory array further includes a second group of redundant elements of the first plurality of fuse-sharing redundant elements. The second group of redundant elements is mutually exclusive with respect to the first group of redundant elements.

REFERENCES:
patent: 5528539 (1996-06-01), Ong et al.
patent: 5689463 (1997-11-01), Murakami et al.

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