Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1997-11-21
1999-10-19
Utech, Benjamin
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438689, 438691, 438633, H01L 21304
Patent
active
059688424
ABSTRACT:
A shallow trench isolation structure is formed by providing a polish stop layer with an opening aligned with edges of a trench formed in the substrate. The etch stop layer might have a surface composition of SiO.sub.x N.sub.y and a composition of SiN or Si.sub.3 N.sub.4 at a lower surface within the polish stop layer. The composition of the silicon oxynitride surface of the polish stop layer is most preferably chosen so that the material has a refractive index on the order of n.about.1.8 to 2.0. The trench is overfilled with silicon oxide so that a layer of silicon oxide extends over the surface of the etch stop layer. Chemical mechanical polishing is then performed to remove the excess silicon oxide from the surface of the etch stop layer and to define an oxide plug within the trench. When the polishing process reaches the surface of the etch stop layer, there is a reduced tendency for the polishing pad to remove material preferentially from the oxide plug because the surface of the polish stop layer is more similar in terms of polishing characteristics to the plug material than in more conventional trench polishing processes. After polishing, the polish stop layer is removed to complete definition of the shallow trench isolation structure.
REFERENCES:
patent: 5441094 (1995-08-01), Pasch
patent: 5629242 (1997-05-01), Nagashima et al.
patent: 5804492 (1998-09-01), Shen
Chen Kin-Chan
United Semiconductor Corp.
Utech Benjamin
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