Techniques for providing a failures in time (FIT) rate for a...

Details Techniques for providing a failures in time (FIT) rate for a... Techniques for providing a failures in time (FIT) rate for a...

2006-09-14

2009-10-06

Lin, Sun J (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07600202

ABSTRACT:
A technique for providing a product FIT rate is performed within electronic circuitry (e.g., one or more computerized devices). The technique involves receiving a Mean Time To Failure (MTTF) target for a product and a Mean Time To Repair (MTTR) target for the product (e.g., a circuit board module). The technique further involves establishing a FIT rate based on the MTTF target and the MTTR target, and then outputting the FIT rate to a design process for the product (e.g., a circuit board design process). The FIT rate is a number of product failures expected per amount of time of product operation.

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Hayashi et al.,“Transformation From Availability Expression to Failure Frequency Expression”, Jun. 2006, IEEE Transactions on Reliability, vol. 55, No. 2, pp. 252 - 261.

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