Techniques for modeling a circuit board structure

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07409667

ABSTRACT:
A technique generates circuit board modeling data for a circuit board structure having multiple layers. The technique includes receiving a set of global circuit board dimension parameters from a user. The set of global circuit board dimension parameters defines a set of global circuit board dimensions of the circuit board structure. The technique further includes forming, for each layer, a set of individual circuit board dimension parameters defining a set of individual circuit board dimensions for that layer based on the set of global circuit board dimension parameters. The technique further includes providing a script for use by a 3D modeling subsystem. The script includes a set of circuit board design values based on the set of individual circuit board dimension parameters formed for each layer. Other properties such as layer width and thickness, via dimensions, etc. are handled in a similar manner.

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