Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2005-11-01
2005-11-01
Elamin, A. (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C713S400000, C709S250000, C709S232000, C710S105000, C370S401000, C370S395100, C375S355000, C375S354000
Reexamination Certificate
active
06961863
ABSTRACT:
An interface for use between an asynchronous domain and a synchronous domain is described. The asynchronous domain is characterized by transmission of data in accordance with a delay-insensitive handshake protocol. The synchronous domain is characterized by transmission of data in accordance with transitions of a clock signal. The interface includes a datapath operable to transfer a data token between the domains. The interface also includes control circuitry operable to enable transfer of the data token via the datapath in response to a transition of the clock signal and at least one completion of the handshake protocol.
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Davies Michael I.
Lines Andrew
Southworth Robert
Beyer Weaver & Thomas LLP
Elamin A.
Fulcrum Microsystems Inc.
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